I had a different non-Intel WiFi card before where the driver literally permanently fried all occupied PCIe slots -- they never worked again and the problem happened right after installing the driver. I don't know how a driver such as this causes that but it looks like it did.

Frequent releases, GitHub repo with good enough user interaction, examples, bug fixing and feedback.

Also, their latest consumer card launches are less then stellar, and the tricks they use to pump up performance numbers are borderline fraud.

As Gamers Nexus puts it "Fake prices for fake frames".

It could possibly come to haunt NVidia or TSMC in decades to come.

What kind of problems did you see on your laptop?

And I'm not even talking about the hassle of the nvidia drivers on Linux (which admittedly has become quite a bit better).

All that just for some negligible graphics power that I'm never using on the laptop.

I can see why you have to be "special" to work at these places.

https://corporatefinanceinstitute.com/resources/valuation/mo...

It is, however, a conflict of interest for you to be involved in company B's acquisition of company A (e.g. influencing company B to buy company A), and might even rise to the level of a breach of your fiduciary duty to company B.

I don't know about "real estate inspection", but another use case was for them to be used in oil rigs in the North Sea to inspect the structure of the rig itself. They had to be self-stabilizing under high winds and adverse weather conditions, and they had to carry a good enough camera to take detailed photos.

Unfortunately, while the technology was there, the market wasn't. Not many wanted to get a $35K drone to be able to sustain this business.

> The reason the President doesn't have this power is because the economy should not rest on the whims or understanding of any one person.

It's interesting to see that it just takes time for lessons to be un-learned. The reason Smoot-Hawley was such a disaster is that it took hundreds of people to agree that it was good policy in the house, which meant adding tariffs to the bill in favor of the districts they individually represented. The result was an egregiously long list of things being tariffed. They delegated it to the one person specifically because they weren't similarly beholden to so many conflicting pressures.

I don't mean any of this to defend Trump's actions, in fact the opposite: he's essentially managing to do the same thing even without politic pressures to do so. I just mean to say that it is reasonably sane for congress to have delegated tariffs in a limited capacity when this flaw was revealed.

Exhibit A: Navarro being sidelined and Scott Bessent put in charge of running tariff negotiations, after the bond markets spooked.

[0] https://en.m.wikipedia.org/wiki/Peter_Navarro

FPGAs are getting cheaper with each gen, expanding into low cost, high volume markets that were unthinkable for an FPGA 10 years ago. Lattice has an FPGA family specifically targeted to smartphones, and I've been consulting for a high end audio company that wanted to do some dsp, and a cheap FPGA was the best option in the market for the particular implementation that they wanted to do.

It's not sexy growth, but it's growth. Otherwise, we wouldn't had the explosion of the latest years in low end FPGA companies.

That's in no small part because the industry & tools seem to be stuck decades in the past. They never had their "GCC moment". But there's also inherent complexity in working at a very low level, having to pay attention to all sorts of details all the time that can't easily be abstracted away.

There's the added constraint that FPGA code is also not portable without a lot of extra effort. You have to pick some specific FPGA you want to target, and it can be highly non-trivial to port it to a different one.

And if you do go through all that trouble, you find out that running your code on a cloud FPGAs turns out to be pretty damn expensive.

So in terms of perf per dollar invested, adding SIMD to your hot loop, or using a GPU as an accelerator may have a lower ceiling, but it's much much more bang for the buck and involves a whole lot less pain along the way.

You can certainly pencil out FPGA or ASIC systems that which would attain high levels of efficient parallelism if there wasn't memory bandwidth or latency limits but there are. If you want to do math that GPUs are good at, you use GPUs. Historically some FPGAs have let you allocate bits in smaller slices so if you only need 6 bit math you can have 6 bit math but GPUs are muscling in on that for AI applications.

FPGAs really are good at bitwise operations used in cryptography. They beat CPUs at code cracking and bitcoin mining but in turn they get beat by ASICs. However there is some number of units (say N=10,000) where the economics of the ASIC plus the higher performance will drive you to ASIC -- for Bitcoin mining or for the NSA's codebreaking cluster. You might prototype this system on an FPGA before you get masks made for an ASIC though.

For something like the F-35 where you have N=1000 or so, could care less about costs, and might need to reconfigure it for tomorrow's threats, the FPGA looks good.

One strange low N case is that of display controllers for retrocomputers. Like it or not a display controller has one heck of a parts count to make out of discrete parts and ASIC display controllers were key to the third generation of home computers which were made with N=100,000 or so. Things like

https://www.commanderx16.com/

and are already expensive compared to the Raspberry Pi so they tend to use either a microcontroller or FPGA, the microcontroller tends to win because an ESP32 which costs a few buck is, amazingly, fast enough to drive a A/D converter at VGA rates or push enough bits for HDMI!

First off, clock rates on an FPGA run at about a tenth that of CPUs, which means you need a 10× parallelism speedup just to break-even, which can be a pretty tall order, even for a lot of embarrassingly parallel problems.

(This one is probably a little bit garbled) My understanding is that the design of FPGAs is such that they're intrinsically worse at getting you FLOP/memory bandwidth number than other designs, which also gives you a cap on expected perf boosts.

The programming model is also famously bad. FPGAs are notorious for taking forever to compile--and the end result of waiting half an hour or more might simply be "oops, your kernel is too large." Also, to a degree, a lot of the benefits of FPGA are in being able to, say, do a 4-bit computation instead of having to waste the logic on a full 8-bits, which means your code also needs to be tailored quite heavily for an FPGA, which makes it less accessible for most programmers.

Intel tried to get around this problem by having a common framework. So one compiler (based on clang) with multiple backends for their CPUs, FPGAs, and GPUs. But in practice it doesn't work. The architectures are too different.

Intel: Welcome, Altera. We'd like you to integrate your FPGA fabric onto our CPUs.

Altera: Sure thing, boss! Loads of our FPGAs get plugged into PCIe slots, or have hard or soft CPU cores, so we know what we're doing.

Intel: Great! Oh, by the way, we'll need the ability to run multiple FPGA 'programs' independently, at the same time.

Altera: Ummmm

Intel: The programs might belong to different users, they'll need an impenetrable security barrier between them. It needs full OS integration, so multi-user systems can let different users FPGA at the same time. Windows and Linux, naturally. And virtual machine support too, otherwise how will cloud vendors be able to use it?

Altera: Uh

Intel: We'll need run-time scaling, so large chips get fully utilised, but smaller chips still work. And it'll need to be dynamic, so a user can go from using the whole chip for one program to sharing it between two.

Intel: And of course indefinite backwards compatibility, that's the x86 promise. Don't do anything you can't support for at least 20 years.

Intel: Your toolchain must support protecting licensed IP blocks, but also be 100% acceptable to the open source community.

Intel: Also your current toolchain kinda sucks. It needs to be much easier to use. And stop charging for it.

Intel: You'll need a college outreach program. And a Coursera course. Of course students might not have our hardware, so we'll need a cloud offering of some sort, so they can actually do the exercises in the course.

Altera: I guess to start with we

Intel: Are you profitable yet? Why aren't you contributing to our bottom line?

As to why it didn't work, well, I'm not plugged into this space to have a high degree of certainty, but my best guess is "FPGAs just aren't that useful for that many things."